| Disclaimer |
The author is NOT responsible for any damage caused to you computer by this program,
the usage of it, etc. or any damge caused to your brain while trying to understand it. This program in no way encourages piracy and the utilities in the program are
intended only for those who have themselves legitimately created archival copies of their own games.
</Obligatory Legal Bullshit>
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| Version History |
| Version 1.5 | 5/16/06 |
Code Search Changes:
- Search results are now displayed within the program, with the option to export. It shows previous values in the results list now as well.
- Fixed a bug with unaligned searches. They appeared to work, on the surface, but resuming them or printing results crashed the program.
- Fixed the Wilcard Value search type. It actually works now. "?" is wildcard.
- Text searches work better now. "*" is still wildcard, but the size of the text search is actuaully determined by the search size setting, like other searches and the comparison is faster.
- The options dialog now includes a folder select popup for setting the results path.
Other Changes:
- Updated a couple pseudo ops, and finally put full list in this readme. Check it out.
- Some fixes and syntax changes for the code assembler. See usage details below.
- Added some new options to both the code assembler and code disassembler.
- Fixed the signing compensation for the 32-bit access search in the ASM searcher.
- Main window now hides itself when you choose a tool.
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| Version 1.41 | 5/7/06 |
Changes:
- Fixed a major bug with the results path on the code search.
- Fixed a bug with the code disassembler crashing do to bad input.
- Fixed the code prefixes in the code assembler for when an '80' address is part of the input.
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| Version 1.4 | 5/6/06 |
Disassembler Changes:
- Added a form to assemble codes.
- Added support for more pseudo ops.
- The ASM Edit dialog has been revamped to allow changing addresses from there and setting data without closing the box. You can press Enter to set the opcode and advance to the next, or Ctrl+Enter to make the change and close the dialog.
- Added an option to save page/changes/etc as codes.
- Added an option to undo all unsaved changes.
- Fixed a few crash bugs due to menu shortcuts being enabled despite the menu items themselves being disabled.
Other Changes:
- Added Open/Save to the code porter
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| Version 1.3 | 5/5/06 |
Disassembler Changes:
- Removed my debug message box that was accidently left enabled in the last build.
- Fixed the bugs in the saving functions. It was really fucked. :(
- Export ROM to Text now grabs the regview setting as it should, plus I added a keyboard shortcut for it (Ctrl+E).
- Added a form to disassemble codes.
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| Version 1.2 | 5/2/06 |
Code Search Changes:
- Added 16-Bit Upper/Lower search sizes. Upper being 0,4,8,C addresses nad lower being 2,6,A,E address.
- Added Known/Not Value List search types. The way they work is you enter a list of calues seperated by commas. It returns all results that are or aren't any of the values.
- Added the option to change what program the search results are opened with (Notepad is the default).
- Value box only gets set to 0 now if the search size is set less than the value in the box. It was starting to annoy me, so I changed it.
Disassembler Changes:
- Added an ASM Search option that has various asm-based search options. See below for more info.
- Added an option to change the endian being disassembled. (This doesn't effect the file, just what you see).
- Fixed the bug when opening files in little endian. I'll fix a couple other things that Parasyte mentioned to me in the next version.
Other Changes:
- Byteswap Tool has a range option and a PJ64->Bin preset now.
- Added a Clear Input button to the Code Porter.
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| Version 1.1 | 4/29/06 |
Minor update:
- 2 Search types added - Active Bits (Any) and Active Bits (All)
- Fixed branches in disassembler
- Added an Edit ASM item to the edit menu in disassembler. The keyboard shortcut was always there, I just forgot to mention it. ;)
- Fixed alignment issues with the Export ROM to Text option, and added the option to include values which was somehow forgotten before.
- Fixed the crash with the GPR reg view option in disassembler and made it save to the CFG now
- Fixed the file crash after canceling disassembler close
- Fixed the exit item on main window menu
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| Version 1.0 | 4/18/06 |
| Another batch of small fixes.
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| Version 0.99 BETA 2 | 4/16/06 |
| I fixed a few bugs, mostly relating to the code searcher, and widened the Disassembly textboxes by a few pixels because certain ops were being cut off.
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| Version 0.99 BETA | 4/14/06 |
| Just Getting Started. This ReadMe probably looks like shit, but at least it's not a goddamn text
file or one of those fucking built-in compiled help files. Those are bloody annoying. I don't want to
create a goddamn database for searching, Shove it up your ass!
|
| Features |
You might note that I released some of these items in somewhat sucky standalone versions a
while ago. These are entirely redone (with the exception of reusing some functions). In my optinion, they
beat the piss out of any of my previous sloppy programs. Check them out.
Current Features:
- Code Searcher
- R4300i Disassembler
- ROM Code Patcher
- Code Porter
- Patch('50') Code Expander
- Goldeneye 007 Target Time Calculator
- Byteswap Tool
- Probably the only Readme you'll ever see that's valid XHTML 1.1. ;-)
Possible To-Do List:
- Show code search results within the program
- Offeset presets on the code porter
- IPS/APS/PK Patch support
- Xploder Cypto tool
- Dexdrive save to emulator mempack/EEPROM converter - If anyone knows the format of .N64 dexdrive files, please fill me in/
Known Issues:
- Code Search: Searching 8MB+ files tends to cause a stack overflow on 8-bit (and probably unaligned bits) searches. I'm currently unable to resolve this.
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| Code Searcher Info |
If you ever used Cheater64, you'll remember it being somewhat slow, but still pretty powerful. If
you've used ViFT you'll remember it being sort of a GODDAMN CONSOLE APP! But it was fast and all-powerful.
Well, This search uses all the same functions as ViFT while keeping most of it's steam via the
renegade64.dll. So now we have speed and a GUI. Let's just hope the damn thing works.
- Make sure the searches folder exists or set the results path to another existing folder.
- ALL values input are assumed hex, EXCEPT for search options with bits or number of addresses being
excluded. The GUI tries to filter anyway, so if you can type hex characters, it's hex input.
- Zip files are NOT supported. I know PJ64 does that by default. There's an option to turn it off
though, and I recommend you do so.
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| Code Porter Info |
| If you remember my old one, you'll remember it only supported GSC text format. This reincarnation
will pretty much port anything you throw at it. Just paste shit into the textbox. Still includes the
option to skip activator code types. It should work well with all N64 and even PSX code types.
|
| Disassembler Usage/Syntax Notes |
| General Notes |
My disassembler is sort of a cross between Niew and PS2DIS. You'll notice if you change the hex value in the edit box the assembly changes accordingly,
just like Niew. Something other disassemblers seem to lack. A couple of notes...
- In the edit dialog, you can press Enter to set the opcode and advance to the next, or Ctrl+Enter to make the change and close the dialog.
- ALL values used in your routines are expected to be Hexadecimal.
- Spacing between registers and such, though frowned upon, is generally supported.
- I noticed that Niew ignores the fact that certain bits are supposed to be empty and shows opcodes from
values it shouldn't. I tried to make this check for those empty bits for more accurate output (hopefully). :)
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| ASM Search |
Options Explained:
- References To 32-Bit Value: Searches for combinations of LUI and ADDI/ADDIU/ORI/LB/LW/etc. It compensates for signing, but it may return some junk results.
- ADDIU/ORI/etc $*,$zero,????: Searches for all ops that set an immediate.
- ADDIU/ORI/SLTIU/etc $*,$*,????: Search for all ops that use an immediate.
- LUI+*TC1: Searches for combinations of LUI and MTC1 with the same opcode.
- Opcode: Simple enough, right? Type in an opcode by itself, no arguments.
- MTC0 Enabler: Looks for MTC0 ops that set WatchLo or WatchHi.
- 80000180 Enablers: Looks for possible 80000180 type enablers.
|
| Immediates/Jump Targets |
Jumps and other opcodes where you use a value are fairly forgiving on syntax of the value.
Some Examples:
JAL 80000060
J 60
JAL $60
J 0x60
ADDIU $V0,$V0,00FF
ADDIU $V0,$V0,FF
ADDIU $V0,$V0,$00FF
ADDIU $V0,$V0,$FF
ADDIU $V0,$V0,0x00FF
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| Branches |
Branches can be done in 2 ways: by address and by immediate. Anything preceeded by an asterisk (*) is considered an immidiate and will set the lower 16-bits (branch location) to that value.
Examples:
BEQ $V0,$A1,0x80000068
BNE $V1,$S1,*3
BNE $V1,$S1,68
Branches in the Code Assembler can be done using either of methods above, plus with labels.
Examples:
BEQ $V0,$A1,80000068
NOP
BNE $V1,$S1,68
ADDIU $V0,$V0,00FF
LUI $K1,3F80
MTC1 $K1,F2
BNE $V1,$S1,bah
ADDIU $V0,$V0,00FF
LUI $K1,3F80
bah:
MTC1 $K1,F2
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| Registers |
Registers are another thing I tried to make flexible.
Some Examples:
ADDIU $V0,$zero,00FF
ADDIU $V0,zero,00FF
ADDIU $V0,R00,00FF
ADDIU $V0,R0,00FF
ADDIU V0,R0,00FF
ADDIU R3,R0,00FF
ADDIU R03,R0,00FF
LUI $K1,3F80
MTC1 $K1,F2
MTC1 $K1,F02
MTC1 $K1,$F2
MTC1 $K1,FPR2
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| Code Assembler Specific Notes |
| Addressing |
The default starting address is 0. This can be changed in two ways
(both within the ASM textbox). The address MUST be aligned for ASM. This
means the address needs to end in 0,4,8 or C. And yes, it has to be Hex!
Method 1: Just use the address on its own line.
80142014
JAL 80000060
ADDIU $V0,$V0,00FF
60
LUI $K1,3F80
JR $RA
MTC1 $K1,F2
Method 2: .ORG Address
.ORG 80142014
JAL 80000060
ADDIU $V0,$V0,00FF
60:
LUI $K1,3F80
JR $RA
MTC1 $K1,F2
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| Comments |
The semi-colon can be used for commenting, either on the end of a line or on a line by itself.
Examples:
ADDIU $V0,$zero,00FF ;V0 will now be 00FF
;Put 3F80 into F2
LUI $K1,3F80
MTC1 $K1,F2
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| Unsupported Opcodes |
|
The only OP that's not supported at all is CACHE. I couldn't figure out how the hell it's assembled.
I was also unsure of some of the Trap OPs. Any of the ones with an Immediate are good, but the ones
like TEQ will give you a little warning. I'm not sure if those are right or not.
|
| Supported Pseudo Opcodes |
| Explanations |
rs = 5-bit source register specifier
rt = 5-bit target (source/destination) register or branch condition
rd = 5-bit destination register specifier
fs = 5-bit floating point source register specifier
ft = 5-bit floating point target (source/destination) register or branch condition
fd = 5-bit floating point destination register specifier
float = Float value (32bit)
base = 5-bit value
imm = 16 bit immediate value
offset = 16 bit branch displacement or address displacement
target = 26 bit jump target address
[] = Optional argument.
|
| Pseudo OPs List |
| OPcode | Arguments | Assembles To |
| NOP | | ADDIU R0,R0,0000 or SLL r0, r0, 0 (Short/Long) |
| MOVE | rd, rs | ADD rd, r0, rs |
| NEG | rd, rt | SUB rd, r0, rt |
| NEGU | rd, rs | SUBU rd, r0, rs |
| BNEZ | rs, offset | BNE rs, r0, offset |
| BNEZL | rs, offset | BNEL rs, r0, offset |
| BEQZ | rs, offset | BEQ rs, r0, offset |
| BEQZL | rs, offset | BEQL rs, r0, offset |
| B / BR / BRA | offset | BEQ r0, r0, offset |
| BAL / BRL / BRAL | offset | BGEZAL r0, offset |
| LI | rt, imm | ORI rt, r0, imm (if imm is 16 bit) or LUI rt, high_16 ORI rt, rt, low_16 (if imm is 32 bit) |
| S.S | ft, offset(base) | SWC1 ft, offset(base) |
| L.S | ft, offset(base) | LWC1 ft, offset(base) |
| LBI / LBA | rt,offset[(base)] | Note 1 |
| LBIU / LBAU | rt,offset[(base)] | Note 1 |
| LDI / LDA | rt,offset[(base)] | Note 1 |
| LDLI / LDLA | rt,offset[(base)] | Note 1 |
| LDRI / LDRA | rt,offset[(base)] | Note 1 |
| LHI / LHA | rt,offset[(base)] | Note 1 |
| LHIU / LHAU | rt,offset[(base)] | Note 1 |
| LLI / LLA | rt,offset[(base)] | Note 1 |
| LLDI / LLDA | rt,offset[(base)] | Note 1 |
| LWI / LWA | rt,offset[(base)] | Note 1 |
| LWLI / LWLA | rt,offset[(base)] | Note 1 |
| LWRI / LWRA | rt,offset[(base)] | Note 1 |
| LWIU / LWAU | rt,offset[(base)] | Note 1 |
| DDIVHI | rd,rs,rt | DDIV rs,rt MFHI rd |
| DDIVLO | rd,rs,rt | DDIV rs,rt MFLO rd |
| DDIVUHI | rd,rs,rt | DDIVU rs,rt MFHI rd |
| DDIVULO | rd,rs,rt | DDIVU rs,rt MFLO rd |
| DMULTHI | rd,rs,rt | DMULT rs,rt MFHI rd |
| DMULTLO | rd,rs,rt | DMULT rs,rt MFLO rd |
| DMULTUHI | rd,rs,rt | DMULTU rs,rt MFHI rd |
| DMULTULO | rd,rs,rt | DMULTU rs,rt MFLO rd |
| MULTHI | rd,rs,rt | MULT rs,rt MFHI rd |
| MULTLO | rd,rs,rt | MULT rs,rt MFLO rd |
| MULTUHI | rd,rs,rt | MULTU rs,rt MFHI rd |
| MULTULO | rd,rs,rt | MULTU rs,rt MFLO rd |
LTC1 / LIC1 (See Note 1) | fd,[rs,],imm If no rs, $K1 is used | (if imm is 16 bit or lower 16 bits are 0) LUI rs, imm MTC1 rs,fd (if imm is 32 bit) LUI rs, high_16 ORI rs, rs, low_16 MTC1 rs,fd |
| LAC1 | fd,offset[(base)] If no base, $K1 is used | LUI base, high_16 LWC1 fd,low_16(base) |
| LFC1 / LFTC1, LFP | fd,[rs,],float If no rs, $K1 is used. | Converts the float to hex and assembles the same as LTC1/LIC1. |
| Note 1 |
- If no base is specified, rt is used.
- The Load byte/word/etc Immediate/Address OPs assemble to:
LUI base, high_16
Lx rt, low_16(base)
example:
LBI $V0,80000060($AT)
Assembles as:
LUI $AT,8000
LB $V0,0060($AT)
- The offset need not be the full address. LBI $V0,60($K1) will assemble the same as above. The '8' is implied. LAC1 works this way too.
- The offset is auto-fixed. WTF does that mean? All Load OPs are signed. 80YYxxxx. If xxxx is greater than 7FFF then 1 must be added to
the upper 16 bits for the load to work.
LBI $V0,8014C6D0
Assembles as:
LUI $V0,8015
LB $V0,C6D0($V0)
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| ROM Patcher Info |
The ROM patcher reads a text file of codes in what's basicly PEC format. An example game entry
is included in the default codes file (n64.ini). I'll update it with a lot more when I get a
chance. I also need to add a few more code types. Suggestions are welcome. One idea I'm considering is
something for modifiers, where the user would set a value/choose an option upon selecting the code for
patching. I think PEC or PJ64 does something like this.
Currently Supported Code Types:
00aaaaaa 000000xx - 8-Bit Write
10aaaaaa 000000xx - 16-Bit Write
20aaaaaa 000000xx - 32-Bit Write
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| Credits/Contact |
Written by Viper187 of GSCentral and The Snake Pit
Special Thanks To:
Parasyte - His 1337 programming/hacking skills are unmatched. I'm always asking him shit.
HyperHacker - GS hacker and VB6 programmer. :)
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